A circuit is disclosed for responding to the signals produced by a shaft position encoder to produce a d-c output that is accurately proportion to the shaft rotation rate. Prior art devices commonly employ detectors that require filtering to produce the d-c output. However, such filtering imposes a lag in the tachometer response speed. If the filtering is eliminated the detector output contains a ripple component that introduces an error into the output response.
U.S. Pat. No. 4,088,960 describes a correlation detector in which circuitry is employed to perform the function of the square root of the sum of the squares of two voltages developed by chopping an input signal. The circuitry involved is relatively complicated.
An article titled FREQUENCY DOUBLER GIVES PURE SINE WAVE appeared in the June 21, 1985, issue of Electronic Design. It presents a simple circuit that performs the function of combining a pair of inputs to produce the square root of the sum of the squares of the inputs. This circuit is readily integratable into conventional silicon monolithic, junction-isolated, integrated circuit (IC) structures.
FIG. 1 illustrates a block diagram of a typical prior art tachometer circuit. A motor 10 is coupled to drive an encoder which converts shaft position to an electrical signal. Typically encoder 11 produces a sine wave signal on line 12 and a cosine wave on line 13. These signals are a-c voltages that have a frequency related to motor shaft rotation. High pass filters 14 and 15 respectively feed these signals to rectifiers 18 and 19 via lines 16 and 17. While conventional filters are preferred at 14 and 15, simple differentiaters will perform the required function. Thus, the amplitudes of the signals on lines 16 and 17 will be a function of the motor shaft rotation rate.
The rectified signals on lines 20 and 21 are combined in summer 22 to provide a d-c output at terminal 23. This output is a d-c signal having a magnitude that is proportional to motor speed. Typically, rectifiers 18 and 19 are full wave devices which act as frequency doublers. Since the two signals applied to summer 22 are in quadrature, the d-c signal at terminal 23 will have a ripple of four times the encoder output frequency. This ripple has the effect of introducing an uncertainty into the d-c output. For the system shown the uncertainty will be about .+-.10%. This uncertainty can be reduced by including low pass filters in lines 20 and 21. If the low pass filters include capacitor inputs, rectifiers 18 and 19 are converted to peak rectifiers. Alternatively, a single low pass filter can be incorporated into the output of summer 22 in which case the filtered d-c is an average value. While the inclusion of a low pass filter will reduce the uncertainty of the d-c output the speed of response of the circuit will also be degraded. In effect, the filter produces a lag in the signal response. Where a rapid response is required, such a lag can be unacceptable. It would be desirable to provide a circuit that produces a pure d-c output that does not require filtering and avoids the inaccuracy imposed by output ripple.